XIO [Examine if Open] & XIC [Examine if Closed] Explained in PLC

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XIO [Examine if Open] & XIC [Examine if Closed] Explained In PLC

XIO [Examine if Open] Explained

Use with processors: All SLC and MicroLogix processors

Example of Instruction:
 
XIO [Examine if Open] & XIC [Examine if Closed] Explained
XIO [Examine if Open] & XIC [Examine if Closed] Explained
 

 

Description
 
This instruction (also called “examine off” or “normally closed”) functions as an input or storage bit. If the corresponding memory bit is a “1” (on), this instruction will not allow rung continuity and outputs on its rung will be de-energized. (Note Other factors may affect rung continuity.)
 
If the corresponding memory bit is a “0” (off), this instruction will  assume its normal status and allow rung continuity and outputs on the rung will be energized. (Again, other factors can influence rung continuity.)
 
If used as an input bit, its status should correspond to the status of real world input devices tied to the input image table by the identical addresses.
 

Addressing Help

Sample: I: 12/03
In the sample address, “I” indicates input image table; “12” represents slot twelve (decimal); after the slash “/” the
“03” indicates bit three. Note Slot 0 is reserved for the processor. Input addresses are specified to the bit level.
 
 

XIC [Examine if Closed] Explained

Use with processors: All SLC and MicroLogix processors
 
Example of Instruction:
 
 

 

Description
 
This instruction (also called “examine on” or “normally opened”) functions as an input or storage bit. If the
corresponding memory bit is a “1” (on), this instruction will allow rung continuity and outputs will be energized.
 
Note: Other factors may affect rung continuity.
 
If the corresponding memory bit is a “0” (off), this instruction will not allow rung continuity (it assumes its normally open state) and outputs on the rung will be de-energized (other factors can influence rung
continuity).
 
If used as an input bit, its status should correspond to the status of real world input devices tied to the input image table by the identical addresses.

Addressing Help

Sample:
I:12/03
In the sample address, “I” indicates input image table; “12”represents slot twelve (decimal); after the slash “/” the
“03” indicates bit three. 
Note: Slot 0 is reserved for the processor. Input addresses are specified to the bit
level.
 
 
 
 
 
 

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